DocumentCode
3546980
Title
1 Volt digital logic circuits realized by stress-resilient ALN parallel dual-beam MEMS relays
Author
Sinha, Nipun ; Guo, Zhijun ; Tazzoli, Augusto ; DeHon, Andre ; Piazza, Gianluca
Author_Institution
Univ. of Pennsylvania, Philadelphia, PA, USA
fYear
2012
fDate
Jan. 29 2012-Feb. 2 2012
Firstpage
668
Lastpage
671
Abstract
This paper reports on the first implementation of low-voltage (~ 1 Vpp) complementary logic elements achieved by body-biasing of novel parallel dual-beam design piezoelectric mechanical relays. By leveraging the mechanical actuation and the nature of these switches we have been able to develop and demonstrate a 2-to-1 multiplexer (mux) based logic design architecture that results in reduced component counts. Low-voltage (1 Vpp), lithographically integrated logic elements such as XOR, OR, AND, Half-Adder, Latch, and a 2-Stage Inverter have been synthesized by using the mux as a building block. This constitutes a step forward in the development of a low energy mechanical computing platform.
Keywords
logic circuits; logic design; micromechanical devices; relays; digital logic circuits; half-adder; low energy mechanical computing platform; low-voltage complementary logic elements; multiplexer; parallel dual-beam design piezoelectric mechanical relays; stress-resilient ALN parallel dual-beam MEMS relays; voltage 1 V; Actuators; CMOS integrated circuits; Fabrication; Latches; Logic circuits; Logic gates; Relays;
fLanguage
English
Publisher
ieee
Conference_Titel
Micro Electro Mechanical Systems (MEMS), 2012 IEEE 25th International Conference on
Conference_Location
Paris
ISSN
1084-6999
Print_ISBN
978-1-4673-0324-8
Type
conf
DOI
10.1109/MEMSYS.2012.6170275
Filename
6170275
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