A systematic approach to CMOS low noise amplifier design for ultrawideband applications

Author

Lee, Hyung-Jin ; Ha, Dong Sam ; Choi, Sang S.

Author_Institution

Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA

fYear

2005

fDate

23-26 May 2005

Firstpage

3962

Abstract

In this paper, we introduce a systematic method to design CMOS low noise amplifiers (LNA) for ultrawideband (UWB) applications. The proposed method is addressed to optimize noise performance and power efficiency while maintaining good input and output matching. The synthesized LNA achieves up to 14 dB power gain with a low noise figure (NF) of 2 dB and provides a reasonably acceptable input and output matching of -10 dB across the frequency range of 3∼5 GHz. The developed LNA, implemented in TSMC 0.18 μm CMOS technology, is a single-stage architecture with very low power dissipation of 9 mW with a 0.9 V supply.

Keywords

CMOS analogue integrated circuits; MMIC amplifiers; impedance matching; low-power electronics; ultra wideband technology; wideband amplifiers; 0.18 micron; 0.9 V; 14 dB; 2 dB; 3 to 5 GHz; 9 mW; CMOS LNA; UWB; input/output impedance matching; low noise amplifier; low power dissipation single-stage architecture; noise performance optimization; power efficiency; source degenerated topology; ultrawideband amplifier; CMOS technology; Design methodology; Frequency synthesizers; Gain; Impedance matching; Low-noise amplifiers; Noise figure; Noise measurement; Optimization methods; Ultra wideband technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1465498

Filename

1465498