A systematic approach to CMOS low noise amplifier design for ultrawideband applications

In this paper, we introduce a systematic method to design CMOS low noise amplifiers (LNA) for ultrawideband (UWB) applications. The proposed method is addressed to optimize noise performance and power efficiency while maintaining good input and output matching. The synthesized LNA achieves up to 14 dB power gain with a low noise figure (NF) of 2 dB and provides a reasonably acceptable input and output matching of -10 dB across the frequency range of 3∼5 GHz. The developed LNA, implemented in TSMC 0.18 μm CMOS technology, is a single-stage architecture with very low power dissipation of 9 mW with a 0.9 V supply.