A low power baseband processor with clock variance-tolerant for UHF RFID transponder

Author

Liangbo Xie ; Jiaxin Liu ; Yao Wang ; Guangjun Wen ; Weizhong Chen

Author_Institution

Centre for RFIC & Syst. Technol., Univ. of Electron. Sci. & Technol. of China, Chengdu, China

Volume

2

fYear

2013

fDate

15-17 Nov. 2013

Firstpage

501

Lastpage

504

Abstract

A novel low-power digital baseband processor for a passive UHF RFID transponder in compliance with the ISO 18000-6B protocol is presented in this paper. By analysing the system requirement, different techniques are proposed for reducing power consumption. Furthermore, a novel clock generating scheme is implemented to accommodate the fluctuation of the frequency from the local oscillator. The chip was designed in TSMC 0.18μm mixed-signal CMOS process, and the area of the proposed baseband processor is 0.71mm×0.155mm. Post-layout simulation results show that the baseband processor dissipates only 0.92uW at 1.28MHz clock.

Keywords

CMOS integrated circuits; ISO standards; UHF circuits; clocks; integrated circuit design; low-power electronics; microprocessor chips; mixed analogue-digital integrated circuits; oscillators; radiofrequency identification; transponders; ISO 18000-6B protocol; TSMC mixed-signal CMOS process; clock generating scheme; clock variance-tolerance; frequency 1.28 MHz; local oscillator; low-power digital baseband processor; passive UHF RFID transponder; power 0.92 muW; power consumption; size 0.155 mm; size 0.18 mum; size 0.71 mm; Baseband; Clocks; ISO standards; Power demand; Radiofrequency identification; Transponders;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications, Circuits and Systems (ICCCAS), 2013 International Conference on

Conference_Location

Chengdu

Print_ISBN

978-1-4799-3050-0

Type

conf

DOI

10.1109/ICCCAS.2013.6765393

Filename

6765393