• DocumentCode
    3547054
  • Title

    An 8b 240 MS/s 1.36 mm2 104 mW 0.18 um CMOS ADC for DVDs with dual-mode inputs

  • Author

    Kim, Se-Won ; Cho, Young-Jae ; Lee, Kyung-Hoon ; Lee, Seung-Hoon ; Lee, Jae-Yup ; Noh, Hyun-Chul ; Lee, Hee-Sub

  • fYear
    2005
  • fDate
    23-26 May 2005
  • Firstpage
    4054
  • Abstract
    This work describes a two-step pipelined 8 bit 240 MS/s 0.18 μm CMOS ADC as one of the embedded cells for high-performance displays requiring low-noise on-chip references and dual-mode inputs with the specifications of limited pins, low power, and small size at high speed. The prototype ADC shows a measured DNL and INL within 0.49 LSB and 0.69 LSB, a SNDR exceeding 38 dB, and an SFDR exceeding 50 dB for inputs up to the Nyquist frequency at 240 MS/s. The ADC consumes 104 mW and the active die area is 1.36 mm2.
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; digital versatile discs; pipeline processing; 0.18 micron; 104 mW; CMOS ADC; DNL; INL; SFDR; SNDR; dual-mode input DVD; low-noise on-chip references; two-step pipelined ADC; CMOS logic circuits; Clocks; DVD; Displays; Energy consumption; Frequency; Pins; Prototypes; Sampling methods; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
  • Print_ISBN
    0-7803-8834-8
  • Type

    conf

  • DOI
    10.1109/ISCAS.2005.1465521
  • Filename
    1465521
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3547054