DocumentCode :
3547070
Title :
A low-voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing
Author :
Vaz, B. ; Goes, J. ; Piloto, R. ; Neto, J. ; Monteiro, R. ; Paulino, N.
Author_Institution :
UNINOVA-CRI, Monte Da Caparica, Portugal
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
4074
Abstract :
A 1.5V 10-b 4MS/s pipeline ADC for sensor interfacing is described. Amplifiers are efficiently shared between stages and low-voltage techniques are used to reduce the power supply down to 1.4V. The selected resolution-per-stage greatly simplifies the implementation of a low-power design. Simulated results using a standard digital 0.18 μm CMOS technology exhibit 9.5 effective bits at Nyquist-rate. The chip occupies 0.6 mm2 and dissipates only 3 mW at maximum conversion-rate.
Keywords :
CMOS digital integrated circuits; amplifiers; analogue-digital conversion; low-power electronics; 0.18 micron; 1.4 V; 3 mW; Nyquist rate; amplifiers; digital CMOS; low-voltage pipeline ADC; sensor interfacing; Ash; CMOS process; CMOS technology; Energy measurement; Pipelines; Power dissipation; Power measurement; Switches; Switching circuits; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1465526
Filename :
1465526
Link To Document :
بازگشت