Title :
AHDL models to detect verification problems early in the design process
Author :
Barby, J.A. ; Shen, H.
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Abstract :
A suite of AHDL models has been developed to enhance the traditional simulation verification of an IC design before it goes to fabrication. A typical IC hardware verification unit is analyzed identifying a minimum subset of simulation models along with their specifications. Proof of concept models were written and tested on a simple IC design to illustrate their usefulness
Keywords :
circuit analysis computing; digital simulation; hardware description languages; integrated circuit design; integrated circuit modelling; AHDL models; IC design; design process; hardware verification unit; proof of concept models; simulation models; simulation verification; verification problems; Circuit simulation; Hardware; Integrated circuit modeling; Integrated circuit testing; Logic; Pins; Process design; Semiconductor device modeling; Silicon; Timing;
Conference_Titel :
ASIC Conference and Exhibit, 1997. Proceedings., Tenth Annual IEEE International
Conference_Location :
Portland, OR
Print_ISBN :
0-7803-4283-6
DOI :
10.1109/ASIC.1997.617033
