Title :
Dither incorporated deterministic dynamic element matching for high resolution ADC test using extremely low resolution DACs
Author :
Jiang, Hanjun ; Chen, Degang ; Geiger, Randall L.
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Abstract :
A novel dither incorporated deterministic dynamic element matching (DIDDEM) approach is proposed. With this approach, the combined output of a DDEM DAC and a dither DAC serves as the stimulus to an ADC under test. Theoretical analysis shows that the test performance with the DIDDEM DAC is equivalent to that of a DAC with an ENOB (effective number of bits) equal to the summation of the ENOB of the DDEM DAC and the dither DAC plus log2p, where p is the DDEM iteration number. The test performance using DiDDEM is also validated by simulation results.
Keywords :
analogue-digital conversion; digital-analogue conversion; integrated circuit testing; mixed analogue-digital integrated circuits; ADC under test; DDEM DAC; DIDDEM; ENOB; dither DAC; dither incorporated deterministic dynamic element matching; effective number of bits; extremely low resolution DAC; high resolution ADC; Built-in self-test; Costs; Hardware; Histograms; Performance analysis; Production; System-on-a-chip; Test equipment; Testing; Voltage;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1465578