DocumentCode
3547259
Title
A programmable floating-gate bump circuit with variable width
Author
Peng, Sheng-Yu ; Minch, Bradley A. ; Hasler, Paul
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2005
fDate
23-26 May 2005
Firstpage
4341
Abstract
We propose a new programmable bump circuit using floating-gate transistors with a simple topology. The center and the width of this bump circuit are orthogonally tunable and programmable. The input signal range is rail to rail and the power consumption does not change dramatically while varying the width. Therefore, this circuit is suitable for low power applications. We use a vector-quantizer as an example to illustrate how this circuit fits into a large scale network.
Keywords
analogue processing circuits; circuit tuning; field effect transistor circuits; nonlinear network synthesis; power consumption; vector quantisation; floating-gate transistors; power consumption; programmable bump circuit; programmable floating-gate bump circuit; topology; variable width; vector-quantizer; Circuit topology; Correlators; Educational institutions; Energy consumption; Gaussian processes; Large-scale systems; Rail to rail inputs; Railway engineering; Tunable circuits and devices; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN
0-7803-8834-8
Type
conf
DOI
10.1109/ISCAS.2005.1465592
Filename
1465592
Link To Document