A new motion compensation design for H.264/AVC decoder

Author

Wang, Sheng-Zen ; Lin, Ting-An ; Liu, Tsu-Ming ; Lee, Chen-Yi

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2005

fDate

23-26 May 2005

Firstpage

4558

Abstract

Motion compensation is always the main bottleneck in real-time or high quality video applications; thus, fast and efficient motion compensation is necessary. A new motion compensation design is presented to overcome the large calculation time of the complicated motion vector prediction (MVP) algorithm and high motion resolution in H.264/AVC. By applying 4×4 block based parallelism and context switch buffers in our design, it can efficiently reduce memory access and increase data reuse probability such that real-time decoding can be achieved with 1080HD (1920×1088) at 100 MHz and search range [-64, +63.75].

Keywords

data compression; logic design; motion compensation; probability; video coding; 1088 pixel; 1920 pixel; 2088960 pixel; H.264/AVC decoder; context switch buffers; data reuse probability; high quality video; memory access; motion compensation design; motion resolution; motion vector prediction algorithm; real-time decoding; real-time video; search range; video compression; Automatic voltage control; Costs; Decoding; Hardware; Interpolation; Motion compensation; Pipelines; Switches; Throughput; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1465646

Filename

1465646