DocumentCode :
3547467
Title :
Ultra-low power flip-flops for MTCMOS circuits
Author :
Levacq, David ; Dessard, Vincent ; Flandre, Denis
Author_Institution :
Microelectron. Lab., Univ. catholique de Louvain, Louvain-la-Neuve, Belgium
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
4681
Abstract :
This paper deals with new MTCMOS flip-flop architectures with high speed performance in active mode and ultra-low power dissipation in sleep mode. The use of new ultra-low leakage latch structure allows us to memorize the flip-flop state even during sleep mode and to strongly reduce the leakage in comparison with previous solutions.
Keywords :
CMOS logic circuits; flip-flops; low-power electronics; power consumption; MTCMOS circuits; active mode; flip-flop architectures; high speed performance; sleep mode; ultra-low leakage latch structure; ultra-low power dissipation; Buildings; CMOS logic circuits; Diodes; Flip-flops; Laboratories; Latches; MOSFET circuits; Microelectronics; Power dissipation; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1465677
Filename :
1465677
Link To Document :
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