Title :
A low power block-matching analog motion estimation processor
Author :
Panovic, Mladen ; Demosthenous, Andreas
Author_Institution :
Dept. of Electron. & Electr. Eng., Univ. Coll. London, UK
Abstract :
This paper presents an analog motion estimation processor utilizing the full-search block-matching algorithm for portable video applications. The system features digital I/O and a low power, area efficient analog computation core. The proof-of-concept processor was fabricated in 0.8μm CMOS occupying 0.63 mm2, and operates on 4-by-4 pixel blocks and a search window of 8-by-8 pixels. Its architecture is however readily scalable to larger pixel blocks and more advanced technologies. Measured results for QCIF video sequences show excellent PSNR performance. A comparison with all-digital equivalents is presented, showing the superiority of the analog approach in all relevant metrics.
Keywords :
CMOS analogue integrated circuits; image sequences; low-power electronics; motion estimation; video signal processing; CMOS; QCIF video sequences; analog motion estimation processor; area efficient analog computation core; block-matching motion estimation processor; digital I/O; full-search block-matching algorithm; low power motion estimation processor; portable video applications; Analog computers; CMOS process; CMOS technology; Circuits; Computer architecture; Educational institutions; Motion estimation; PSNR; Power engineering computing; Video sequences;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1465713
