DocumentCode
3547508
Title
An Nth order central symmetrical layout pattern for nonlinear gradients cancellation
Author
Dai, Xin ; He, Chengming ; Xing, Hanqing ; Chen, Degang ; Geiger, Randall
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
fYear
2005
fDate
23-26 May 2005
Firstpage
4835
Abstract
In this paper, systematic mismatch due to parameter gradients is modeled and analyzed. A new layout strategy with flexible cell placement is proposed. Theoretical analysis shows its property of canceling the mismatch between two devices due to up to nth order gradient effects by using 2n unit cells for each device. Simulation results show that the proposed technique gives better matching characteristics than other existing layout techniques under nonlinear gradients.
Keywords
integrated circuit layout; mixed analogue-digital integrated circuits; central symmetrical layout pattern; flexible cell placement; nth order gradient effects; nonlinear gradients cancellation; parameter gradients; systematic mismatch; Analog-digital conversion; Capacitors; Circuit simulation; Fabrication; Helium; Mirrors; Mixed analog digital integrated circuits; Pipelines; Polynomials; Sampling methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN
0-7803-8834-8
Type
conf
DOI
10.1109/ISCAS.2005.1465715
Filename
1465715
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