DocumentCode :
3547513
Title :
New graph transformation schemes in graph-based memory allocation method for an indirect addressing DSP
Author :
Sugino, Nobuhiko ; Matsuura, Tomoyuki ; Nishihara, Akinori
Author_Institution :
Dept. of Adv. Appl. Electron., Tokyo Inst. of Technol., Yokohama, Japan
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
4855
Abstract :
For indirect addressing DSPs, a novel memory address allocation method based on graph representation is presented. The method translates a given memory access sequence into a graph notation, and transforms it into line-shaped graphs. At the transformation, a cost evaluation measure is newly introduced, so that efficient memory allocation is given. The proposed cost functions are applied to the existing memory allocation method, and memory allocation results derived for several examples show its effectiveness.
Keywords :
graph theory; programming; signal processing; storage allocation; storage management; DSP code; compilers; cost functions; digital signal processors; graph notation; graph representation; graph transformation schemes; indirect addressing DSP; line-shaped graphs; memory access sequence; memory address allocation; programming tools; real-time digital signal processing algorithms; Computer science; Cost function; Digital signal processing; Educational technology; Hardware; Program processors; Programming profession; Read-write memory; Registers; Signal processing algorithms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1465720
Filename :
1465720
Link To Document :
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