Title :
A new 5 GHz CMOS dual-modulus prescaler
Author :
Yu, X.P. ; Do, M.A. ; Ma, J.-G. ; Yeo, K.S.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Abstract :
A new prescaler based on an improved phase switching method is proposed. It reduces the complexity of the existing phase switching architecture, while maintaining robust control during operation. Different from the conventional way, in the new prescaler, the duty cycle of the switched signal is manually modified in advance to reduce the error window, and, as a result, the operating speed and power consumption can be well-balanced and free of glitches. The proposed divide-by 7/8 prescaler, using the Chartered 0.18 μm CMOS process, is capable of operating up to 5 GHz for a 1.8 V supply voltage with 10 mW power consumption.
Keywords :
CMOS digital integrated circuits; circuit complexity; frequency dividers; integrated circuit design; power consumption; switching circuits; 0 to 5 GHz; 0.18 micron; 1.8 V; 10 mW; CMOS dual-modulus prescaler; Chartered CMOS process; complexity; high-speed frequency divider; operating speed; phase switching method; power consumption; Circuits; Delay; Detectors; Energy consumption; Equations; Frequency conversion; Frequency synthesizers; Robust control; Switches; Topology;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1465763
