DocumentCode :
3547599
Title :
IBMG: interpretable behavioral model generator for nonlinear analog circuits via canonical form functions and genetic programming
Author :
McConaghy, Trent ; Gielen, Georges
Author_Institution :
ESAT-MICAS, Katholieke Univ., Leuven, Belgium
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
5170
Abstract :
The paper presents IBMG, an approach to generate behavioral models of nonlinear analog circuits, with the special distinction that it generates models that are compact and interpretable expressions which are not restricted to any pre-defined functional templates. IBMG outputs a small set of interpretable nonlinear differential equations that approximate the time-domain behavior of the circuit being modeled. The approach uses genetic programming (GP), which evolves functions, but GP has been heavily modified so that the behavioral expressions follow a special "canonical functional form" grammar to remain interpretable. IBMG has explicit error control; it provides a set of models that trade off complexity and accuracy. Experimental results on a strongly nonlinear latch circuit demonstrate the usefulness of IBMG.
Keywords :
analogue integrated circuits; analogue processing circuits; approximation theory; computational complexity; electronic design automation; functions; genetic algorithms; integrated circuit design; integrated circuit modelling; mixed analogue-digital integrated circuits; nonlinear differential equations; nonlinear network synthesis; time-domain synthesis; canonical form functions; canonical functional form grammar; complexity-accuracy trade-off; explicit error control; genetic programming; interpretable behavioral model generator; interpretable nonlinear differential equations; latch circuit; mixed-signal ICs; nonlinear analog circuits; nonlinear circuits; system-level analog design practices; time-domain behavior; Analog circuits; Circuit simulation; Differential equations; Genetic programming; Kernel; Nonlinear circuits; Polynomials; State-space methods; System-level design; Time domain analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1465799
Filename :
1465799
Link To Document :
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