Title :
Feedforward-type parasitic capacitance canceler and its application to 4 Gb/s T/H circuit
Author :
Sato, Takahide ; Takagi, Shigetaka ; Fujii, Nobuo ; Hashimoto, Yasuyuki ; Sakata, Kohji ; Okada, Hiroyuki
Author_Institution :
Tokyo Inst. of Technol., Japan
Abstract :
This paper proposes a novel parasitic capacitance cancellation method. Since parasitics are canceled by feedforwarding signals, a circuit using the proposed cancellation method is always stable unlike a conventional method using a negative impedance converter. This cancellation method is applicable to a balanced-type circuit driving capacitors with source followers. As an example it is applied to implementation of a high-speed track-and-hold circuit (T/H circuit). Thanks to this method implementation of a 4-Gbit/s T/H circuit with 6-bit accuracy is confirmed through HSPICE simulations with 90-nm CMOS process under 0.9-V power supply voltage.
Keywords :
CMOS analogue integrated circuits; capacitance; circuit stability; feedforward; sample and hold circuits; 0.9 V; 4 Gbit/s; 6 bit; 90 nm; CMOS process; balanced-type circuit; circuit stability; feedforward-type parasitic capacitance canceler; high-speed T/H circuit; source followers; track-and-hold circuit; CMOS process; Capacitors; Circuit simulation; Circuit stability; Feedback loop; Impedance; National electric code; Parasitic capacitance; Power supplies; Voltage;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1465897