DocumentCode :
3547803
Title :
System LSI design with C-based behavioral synthesis and verification
Author :
Wakabayashi, Kazutoshi
Author_Institution :
Syst. Devices Res. Labs., NEC Corp., Kawasaki, Japan
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
5930
Abstract :
The paper presents the effects of system LSI design with C language-based behavioral synthesis. The proposed C-based tool flow and how to synthesize and verify an entire system LSI are explained. The merits of behavioral synthesizable modules and configurable processors are then discussed.
Keywords :
C language; electronic design automation; formal verification; integrated circuit design; large scale integration; logic design; software tools; C-based behavioral synthesis; C-based tool flow; C-based verification; behavioral synthesizable modules; configurable processors; logic design; system LSI design; Central Processing Unit; Circuit simulation; Digital signal processing; Embedded software; Field programmable gate arrays; Hardware; Laboratories; Large scale integration; National electric code; Synthesizers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1465989
Filename :
1465989
Link To Document :
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