Analog VLSI circuit-level synthesis using multi-placement structures

This paper contributes to the circuit-level design field the novel idea of multi-placement structures. They enable a fast and optimized placement instantiation in analog circuit-level synthesis. A multi-placement structure needs to be generated only once for a specific circuit topology. We propose its use in synthesis. This pre-generated structure instantiates different layout floor-plans for different sizes and parameters of a circuit. It offers a multitude of high-quality variants for placements of a circuit along with a fast execution time. Speed results from the efficiency of the structure. The optimality of placements variants derives from the intelligent search process used to build it. The target benchmarks of these structures are analog ones that need to be synthesized. They are in the vicinity of 25 modules. This paper presents a circuit synthesis approach for analog circuits using multi-placement structures.