DocumentCode :
3547873
Title :
Offset compensation in flash ADCs using floating-gate circuits
Author :
Brady, Philomena ; Hasler, Paul
Author_Institution :
Dept. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
6154
Abstract :
Traditionally, high speed analog to digital converters (ADC) are built using various forms of the flash converter architecture. However, all of these structures suffer from one major flaw, offsets. Whether these offsets are introduced from the resistive biasing network, mismatches in the comparators, or from other sources, extensive care must be taken to compensate for them. There are several methods used to correct for these offsets, but many of these methods require complicated compensation circuitry or greatly increase the cost and area of the ADC. This paper presents an alternative to these methods, implementing the high speed data converters using floating-gate circuits. The floating-gate circuits provide a method of accurately programming the reference voltages of the flash converter, instead of obtaining them from a resistive biasing network. As a result, any form of offset that is introduced can be compensated for by adjusting the reference voltage.
Keywords :
analogue-digital conversion; compensation; high-speed integrated circuits; flash ADC; flash converter; floating-gate circuits; high speed analog to digital converters; high speed data converters; offset compensation; Analog-digital conversion; Computer architecture; Costs; Decoding; Nonvolatile memory; Potentiometers; Resistors; Signal processing; Trigger circuits; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1466045
Filename :
1466045
Link To Document :
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