A novel approach for implementing ultra-high speed flash ADC using MCML circuits

Author

Dang, H. ; Sawan, M. ; Savaria, Y.

Author_Institution

PolySTIM Neurotechnol. Lab., Ecole Polytech. de Montreal, Que., Canada

fYear

2005

fDate

23-26 May 2005

Firstpage

6158

Abstract

We propose in this paper a new MOS current-mode logic (MCML) approach for implementing ultra-rapid and accurate comparators for flash ADC applications. The speed-to-power ratio of the MCML comparator is improved by a factor of 3 compared to CMOS latch counterparts. MCML is also used to build up the subsequent 6-bit flash decoder block which exhibits better performance than the fastest published 6-bit CMOS decoder. A 6-bit full-flash ADC has been implemented and sent to TSMC for fabrication in 0.18-μm CMOS. Post-layout simulations show that the ADC operates at 1.25 GHz, with an effective resolution bandwidth (ERBW) near 600 MHz.

Keywords

CMOS logic circuits; analogue-digital conversion; comparators (circuits); current-mode logic; 0.18 micron; 1.25 GHz; 6 bit; CMOS decoder; ERBW; MCML circuits; MOS current-mode logic; effective resolution bandwidth; post-layout simulations; speed-to-power ratio; ultra-high speed flash ADC; ultra-rapid accurate comparators; CMOS logic circuits; Clocks; Decoding; Delay; Energy consumption; Laboratories; Latches; Power dissipation; Radio frequency; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1466046

Filename

1466046