DocumentCode
3547887
Title
A generic multilevel multiplying D/A converter for pipelined ADCs
Author
Sharma, Vivek ; Moon, Un-Ku ; Temes, Gabor C.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci, Oregon State Univ., Corvallis, OR, USA
fYear
2005
fDate
23-26 May 2005
Firstpage
6182
Abstract
State-of-art implementations of pipelined ADC can only realize a multiplying DAC (MDAC) with (2n-1) levels. However, the number of levels needed to optimize the performance may differ from this number. A novel scheme is proposed allowing for realization of an arbitrary number of MDAC levels, while allowing for 1 bit of digital redundancy and digital error correction without any overhead.
Keywords
analogue-digital conversion; circuit optimisation; digital-analogue conversion; error correction; multiplying circuits; pipeline processing; redundancy; MDAC; digital error correction; digital redundancy; generic multilevel D/A converter; multiplying D/A converter; multiplying DAC; optimization; pipelined ADC; Costs; Design methodology; Error correction; Moon; Nonlinear distortion; Pipelines; Quantization; Redundancy; Robustness;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN
0-7803-8834-8
Type
conf
DOI
10.1109/ISCAS.2005.1466052
Filename
1466052
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