An 800 Mbps system interconnect modeling and simulation for high speed computing

System interconnect modeling for high speed systems is a vital bottleneck for high speed data transfer. We demonstrate the modeling process on a high speed computer differential net running at 400 MHz (800 Mbit/s) with IBM I/O cells. The modeling of the traces on the boards was done using a field solver. The transmission line matrices were used in a SPICE model, and 3-simulation scenarios were tested for this model. The obtained EYE opening of the modeled interconnect simulation was 705 mV while the measured EYE opening for the same net topology in the laboratory was 710 mV. This shows a close match between the actual behavior and the model generated. Careful modeling can be very beneficial to get a design running at first time operation.