Title :
Modem floorplanning with abutment and fixed-outline constraints
Author :
Lin, Chang-Tzu ; Chen, De-Sheng ; Wang, Yi-Wen ; Ho, Hsin-Hsien
Author_Institution :
Dept. of Inf. Eng. & Comput. Sci., Feng Chia Univ., Taichung, Taiwan
Abstract :
The typical floorplanning problem concerns a series of objectives, such as area, wirelength and routability, etc., without any specific constraint in a free-outline style. Entering the SOC era, however, modern floorplanning takes more care of providing extra options to place dedicated modules in the hierarchical designs, such as abutment, boundary and fixed-outline constraints, etc. It has been empirically shown that any of the modern constraints extremely restricts the solution space, that is, a large number of randomly generated floorplans might violate the constraint. This paper addresses modern floorplanning with abutment and fixed-outline constraints. In order to search the drastically limited solution space, we first investigate the feasible properties of a slicing floorplan with abutment constraint. The properties, coupled with an efficient evolutionary search algorithm provide the way to produce floorplans with abutment constraint. We then extend the algorithm with minor modification to enable the abutment floorplans to be gradually fitted into the desirable fixed outline. The methods are verified by using the MCNC and GSRC benchmarks, and the empirical results show that our methods can obtain promising solutions in a short time.
Keywords :
circuit layout; evolutionary computation; search problems; system-on-chip; SOC; abutment; evolutionary search algorithm; fixed-outline constraints; floorplanning; slicing floorplan; Computer science; Integrated circuit interconnections; Random number generation; Simulated annealing; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1466060