DocumentCode
3548011
Title
Communication-driven task binding for multiprocessor with latency insensitive network-on-chip
Author
Lin, Liang-Yu ; Wang, Cheng-Yeh ; Huang, Pao-Jui ; Chou, Chih-Chieh ; Jou, Jing-Yang
Author_Institution
Dept. of Electron. Eng., National Chiao Tung Univ., Hsinchu, Taiwan
Volume
1
fYear
2005
fDate
18-21 Jan. 2005
Firstpage
39
Abstract
Network-on-chip is a new design paradigm for designing core based system-on-chip. It features high degree of reusability and scalability. In this paper, we propose a switch which employs the latency insensitive concepts and applies the round-robin scheduling techniques to achieve high communication resource utilization. Based on the assumptions of the 2D-mesh network topology constructed by the switch, this work not only models the communication and the contention effect of the network, but develops a communication-driven task binding algorithm that employs the divide and conquer strategy to map applications onto the multiprocessor system-on-chip. The algorithm attempts to derive a binding of tasks such that the overall system throughput is maximized. To compare with the task binding without consideration of communication and contention effect, the experimental results demonstrate that the overall improvement of the system throughput is 20% for 844 test cases.
Keywords
integrated circuit design; network topology; system-on-chip; 20 percent; 2D-mesh network topology; communication driven task binding; high communication resource utilization; latency insensitive concepts; multiprocessor system-on-chip; network on chip; round robin scheduling technique; Communication switching; Delay; Network topology; Network-on-a-chip; Resource management; Round robin; Scalability; Switches; System-on-a-chip; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
Print_ISBN
0-7803-8736-8
Type
conf
DOI
10.1109/ASPDAC.2005.1466126
Filename
1466126
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