Title :
A 10Gb/s transmitter with multi-tap FIR pre-emphasis in 0.18μm CMOS technology
Author :
Li, Miao ; Kwasniewski, Tad ; Wang, Shoujun ; Tao, Yuming
Author_Institution :
Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
Abstract :
A 10Gb/s current mode logic (CML) transmitter with multi-tap finite impulse response (FIR) pre-emphasis has been implemented in 0.18μm CMOS technology. A half-rate clock retiming circuit for generating symbol-spaced data is proposed to alleviate the speed requirement of the traditional full-rate clock retiming. HSPICE simulation results of a 5-tap FIR transmitter show that the closed eye over a 34" FR4 backplane can be opened to 0.72UI at 10Gb/s. The power dissipation of the transmitter is 50m W at a 1.8V supply.
Keywords :
CMOS logic circuits; FIR filters; SPICE; clocks; transmitters; 0.18 micron; 1.8 V; 10 Gbit/s; 50 mW; CMOS technology; FIR transmitter; FR4 backplane; HSPICE simulation; current mode logic transmitter; finite impulse response; half-rate clock retiming; multi-tap FIR pre-emphasis; speed requirement; symbol-spaced data; Backplanes; CMOS logic circuits; CMOS technology; Circuit simulation; Clocks; Driver circuits; Finite impulse response filter; MATLAB; Transceivers; Transmitters;
Conference_Titel :
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
Print_ISBN :
0-7803-8736-8
DOI :
10.1109/ASPDAC.2005.1466422
