An 11-bit 160-MS/s 1.35-V 10-mW D/A converter using automated device sizing system

Author

Matsumoto, Osamu ; Harada, Wisashi ; Morimoto, Yasuo ; Kumamoto, Toshio ; Miki, Takahiro ; Hotta, Masao

Author_Institution

Renesas Technol. Corp., Itami, Japan

Volume

2

fYear

2005

fDate

18-21 Jan. 2005

Firstpage

809

Abstract

This paper describes an automated device sizing system for current-steering D/A converters (DACs) and an 11-bit 160-MS/s DAC implemented using this system. Based on an analysis of harmonic distortion (or spurious) of the DAC, a circuit technique named one-Vgs switching has been newly developed for realizing high spurious free dynamic range (SFDR). The automated device sizing system has also been developed for quick retargeting of the current-steering DAC. The 11-bit 160-MS/s DAC has been designed using this system and fabricated in a 0.18-μm technology. It operates at 1.35-V power supply with 10-mW power consumption, 1.6-Vppd output swing, and 61-dB SFDR at f_sig=10.2 MHz. Its active area is 0.22 mm².

Keywords

digital-analogue conversion; harmonic distortion; 0.18 micron; 1.35 V; 1.6 V; 10 mW; 11 bit; automated device sizing system; circuit technique; current-steering D/A converters; harmonic distortion analysis; one-Vgs switching; spurious free dynamic range; Calibration; Circuits; Cities and towns; Equations; Harmonic analysis; Harmonic distortion; Optimization methods; Power supplies; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific

Print_ISBN

0-7803-8736-8

Type

conf

DOI

10.1109/ASPDAC.2005.1466467

Filename

1466467