DocumentCode
3548404
Title
Comprehensive analysis and optimization of CMOS LNA noise performance
Author
Feng, Dong ; Shi, Bingxue
Author_Institution
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Volume
2
fYear
2005
fDate
18-21 Jan. 2005
Firstpage
1204
Abstract
Comprehensive analysis of CMOS low noise amplifier (LNA) noise performance is presented in this paper, including channel noise and induced gate noise in MOS devices. The impacts of distributed gate resistance and intrinsic channel resistance on noise performance are also considered and formulized. A new analytical formula for noise figure is proposed. Two kinds of noise optimization approaches are performed. This work will benefit the design of high performance CMOS LNA.
Keywords
CMOS integrated circuits; amplifiers; integrated circuit noise; optimisation; CMOS low noise amplifier; MOS devices; channel noise; distributed gate resistance; gate noise; intrinsic channel resistance; noise figure; noise optimization; noise performance; CMOS process; Circuit noise; Impedance matching; Low-noise amplifiers; Microelectronics; Noise figure; Partial response channels; Performance analysis; Performance gain; Radio frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
Print_ISBN
0-7803-8736-8
Type
conf
DOI
10.1109/ASPDAC.2005.1466558
Filename
1466558
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