Title :
Fault-tolerant memory design in the IBM application system/400
Author :
Chen, C.L. ; Grosbach, L.E.
Author_Institution :
IBM Corp., Poughkeepsie, NY, USA
Abstract :
Some of the fault-tolerant features of the IBM AS/400 main storage subsystem are described, with particular attention to the error-correcting code for the 4-bit-per-chip memory array. Single 4-bit symbol errors are automatically corrected, and double symbol errors are detected and corrected with additional machine cycles. The procedure, which is implemented in hardware, is described. The AS/400 storage model and management and the memory maintenance strategy are described.<>
Keywords :
IBM computers; error correction codes; fault tolerant computing; storage management; 4-bit-per-chip memory array; IBM application system/400; double symbol errors; error-correcting code; fault-tolerant features; machine cycles; main storage subsystem; Algorithm design and analysis; Application software; Buildings; Cache storage; Capacity planning; Computer errors; Error correction; Error correction codes; Fault tolerance; Fault tolerant systems;
Conference_Titel :
Fault-Tolerant Computing, 1991. FTCS-21. Digest of Papers., Twenty-First International Symposium
Conference_Location :
Montreal, Quebec, Canada
Print_ISBN :
0-8186-2150-8
DOI :
10.1109/FTCS.1991.146691
