• DocumentCode
    3549768
  • Title

    Feasibility study of a novel molecular-pore-stacking (MPS), SiOCH film in fully-scale-down, 45nm-node Cu damascene interconnects

  • Author

    Tada, M. ; Ohtake, H. ; Narihiro, M. ; Ito, F. ; Taiji, T. ; Tohara, M. ; Motoyama, K. ; Kasama, Y. ; Tagami, M. ; Abe, M. ; Takeuchi, T. ; Arai, K. ; Saito, S. ; Furutake, N. ; Onodera, T. ; Kawahara, J. ; Kinoshita, K. ; Hata, N. ; Kikkawa, T. ; Tsuchiy

  • Author_Institution
    Svstem Devices Res. Labs., NEC Corp., Japan
  • fYear
    2005
  • fDate
    14-16 June 2005
  • Firstpage
    18
  • Lastpage
    19
  • Abstract
    Molecular-pore-stacking (MPS), SiOCH films (k=2.4) are integrated in 45nm-node Cu interconnects with 140nm-pitched lines and 70nm-vias, and the feasibility is confirmed. The MPS film, which is deposited by plasma-polymerization of robust ring-type siloxane molecules, has the self-organized, porous structure with reinforcing the mechanical properties. The low permittivity is sustained in the 140nm-pitched lines by oxidation-damage-free etching, and the inter-line dielectric reliability is confirmed along with the BCB pore-seal technique, estimating 15.9% reduction in the 70nm-spaced, line capacitance refer to that of the 65nm-node SDIs. The MPS/Cu interconnect is one of the strong candidates for 45nm-node ULSI devices.
  • Keywords
    ULSI; copper; dielectric thin films; etching; integrated circuit interconnections; permittivity; plasma CVD; polymerisation; reliability; silicon compounds; BCB pore-seal technique; Cu damascene interconnects; MPS film; SDI; ULSI devices; interline dielectric reliability; line capacitance; low permittivity; mechanical properties; molecular-pore-stacking; oxidation-damage-free etching; plasma-polymerization; porous low-k film; porous structure; ring-type siloxane molecules; Capacitance; Etching; Mechanical factors; National electric code; Permittivity; Plasma applications; Plasma chemistry; Plasma properties; Polymer films; Robustness;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 2005. Digest of Technical Papers. 2005 Symposium on
  • Print_ISBN
    4-900784-00-1
  • Type

    conf

  • DOI
    10.1109/.2005.1469195
  • Filename
    1469195