Title :
A 6F2 DRAM technology in 60nm era for gigabit densities
Author :
Cho, Changhyun ; Song, Sangho ; Kim, Sangho ; Jang, Sungho ; Lee, Sungsam ; Kim, Hyungtak ; Sung, Yangsoo ; Jeon, Sangmin ; Yeo, Gisung ; Kim, Yungi ; Yungi Kim ; Jin, Gyoyoung ; Kinam Kim
Author_Institution :
Device Solution Network, Samsung Electron. Co., Yongin, South Korea
Abstract :
A novel process technology for 6F2 DRAM cell at 68nm design rule was for the first time developed. The cell size is 0.028μm2, which is the smallest cell size ever reported. ArF lithography with double expose technology and highly selective etching process were used for patterning of critical layers. This 6F cell was made of simple line/space patterns for easy patterning and self-aligned etches to improve process margins. MIM cell capacitor was developed with multi-layer high-k dielectric materials and 11A equivalent Tox and sub-lfA leakage was confirmed.
Keywords :
DRAM chips; MIM structures; etching; nanolithography; nanopatterning; nitridation; photolithography; 60 nm; 68 nm; 6F2 DRAM cell; ArF lithography; MIM cell capacitor; double expose technology; etching process; gigabit densities; layer patterning; multi-layer high-k dielectric materials; sub-lfA leakage; Boron; Capacitance; Electrodes; Etching; Intelligent networks; Lithography; MIM capacitors; MOS devices; Random access memory; Space technology;
Conference_Titel :
VLSI Technology, 2005. Digest of Technical Papers. 2005 Symposium on
Print_ISBN :
4-900784-00-1
DOI :
10.1109/.2005.1469202