A 1.5 GHz 90 nm embedded microprocessor core

Author

Ricci, Franco ; Clark, Lawrence T. ; Beatty, Tim ; Yu, Wing ; Bashmakov, Alex ; Demmons, Shay ; Fox, Eric ; Miller, Jay ; Biyani, Manish ; Haigh, Jon

Author_Institution

Intel Corp., Chandler, AZ, USA

fYear

2005

fDate

16-18 June 2005

Firstpage

12

Lastpage

15

Abstract

A 90 nm ARM™ V5TE compatible microprocessor core intended for high performance and low power embedded applications is described. The core includes an ECC protected 2 level 512 MB cache, high-bandwidth single-cycle L1 cache line fill and evict, and cache coherency. Circuit design for high speed and low power are described, as well as their impact on the micro-architecture. Features to support low standby power modes and embedded test are also described.

Keywords

VLSI; cache storage; embedded systems; flip-flops; logic design; microprocessor chips; 1.5 GHz; 90 nm; ARM; ECC; V5TE compatible microprocessor core; VLSI; cache coherency; circuit design; embedded microprocessor core; embedded test; low standby power modes; micro-architecture; single-cycle L1 cache line fill; Circuit testing; Clocks; Delay; Energy consumption; Latches; Microprocessors; Pipelines; Pulse circuits; Space vector pulse width modulation; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on

Print_ISBN

4-900784-01-X

Type

conf

DOI

10.1109/VLSIC.2005.1469322

Filename

1469322