DocumentCode
3549915
Title
Low power programmable-gain CMOS distributed LNA for ultra-wideband applications
Author
Zhang, Frank ; Kinget, Peter
Author_Institution
Columbia Integrated Syst. Lab, Columbia Univ., New York, NY, USA
fYear
2005
fDate
16-18 June 2005
Firstpage
78
Lastpage
81
Abstract
A design methodology is presented for low power distributed amplifiers and is used for the design of a 9 mW LNA with programmable gain implemented in a 0.18 μm CMOS process. The LNA provides a gain of 8 ± 0.6 dB from DC to 6.2 GHz, with an input match of -16 dB and an output match of -10 dB over the entire band. The IIP3 is +1.8 dBm, and the NF ranges from 4.2 to 6.2 dB. The gain is tunable from -10 dB to +8 dB while gain flatness and matching are maintained.
Keywords
CMOS analogue integrated circuits; distributed amplifiers; gain control; integrated circuit design; low-power electronics; programmable circuits; ultra wideband technology; -10 to 8 dB; 0 to 6.2 GHz; 0.18 micron; 4.2 to 6.2 dB; 9 mW; distributed LNA; programmable gain CMOS; ultrawideband applications; Bandwidth; CMOS process; Cutoff frequency; Design methodology; Distributed amplifiers; Energy consumption; Gain; Impedance matching; Inductors; Ultra wideband technology;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on
Print_ISBN
4-900784-01-X
Type
conf
DOI
10.1109/VLSIC.2005.1469338
Filename
1469338
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