DocumentCode
3549920
Title
A spread spectrum clock generation PLL with dual-tone modulation profile
Author
Kim, Deok-Soo ; Jeong, Deog-Kyoon
Author_Institution
Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
fYear
2005
fDate
16-18 June 2005
Firstpage
96
Lastpage
99
Abstract
This paper describes a spread spectrum clock generation (SSCG) PLL that uses a dual-tone modulation profile. The proposed modulation profile consists of the weighted sum of triangular waves. A mathematical analysis is applied to find out the optimum weight. Experimental results show that the Δ-Σ fractional-N PLL with the clock modulator exhibits better performance than a traditional SSCG by more than 2dB at the 630MHz operation.
Keywords
clocks; electromagnetic interference; phase locked loops; Δ-Σ modulator; 630 MHz; clock modulator; dual-tone modulation profile; fractional-N PLL; spread spectrum clock generation; Attenuation; Bandwidth; Clocks; Electromagnetic interference; Electronic mail; Filters; Frequency modulation; Mathematical analysis; Phase locked loops; Spread spectrum communication;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on
Print_ISBN
4-900784-01-X
Type
conf
DOI
10.1109/VLSIC.2005.1469342
Filename
1469342
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