DocumentCode :
3549940
Title :
A 106dB audio digital-to-analog converter employing segment flipping technology combined with cascaded dynamic element matching
Author :
Ido, Toru ; Ishizuka, Sonny ; Hamasaki, Toshi
Author_Institution :
Dept. of Analog Design, Texas Instrum. Japan Ltd., Kanagawa, Japan
fYear :
2005
fDate :
16-18 June 2005
Firstpage :
174
Lastpage :
175
Abstract :
A 106dB stereo audio digital-to-analog converter having high power supply rejection and reduced jitter sensitivity using newly developed segment flipping technology combined with cascaded dynamic element matching is presented. Current source has high power supply rejection as a segment, however it has worse mismatch characteristics than other commonly used segment device such as resistor and capacitor. Proposed segment flipping technology combined with cascaded dynamic element matching highly reduces the mismatch problems enough to increase the number of current segments for higher jitter tolerance. A 106dB stereo audio digital-to-analog converter using proposed technologies, having high tolerance against power supply noise and clock jitter, is designed, and the fabricated device shows 106.1dB SNR, 104.6dB channel separation, and 0.0018% THD+N at full scale input within 3.39mm2 die area.
Keywords :
CMOS integrated circuits; audio signal processing; digital-analogue conversion; flip-chip devices; noise; timing jitter; 106.1 dB; audio digital-to-analog converter; cascaded dynamic element matching; clock jitter; jitter sensitivity; mismatch characteristic; power supply noise; power supply rejection; segment flipping technology; Clocks; Consumer electronics; Delta-sigma modulation; Digital-analog conversion; Hardware; Jitter; Master-slave; Noise shaping; Power supplies; Shape;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on
Print_ISBN :
4-900784-01-X
Type :
conf
DOI :
10.1109/VLSIC.2005.1469360
Filename :
1469360
Link To Document :
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