DocumentCode :
3549973
Title :
A highly linear filter and VGA chain with novel DC-offset correction in 90nm digital CMOS process
Author :
Elmala, Mostafa ; Carlton, Brent ; Bishop, Ralph ; Soumyanath, Krishnamurthy
Author_Institution :
Intel R&D, Intel Corp., Hillsboro, OR, USA
fYear :
2005
fDate :
16-18 June 2005
Firstpage :
302
Lastpage :
303
Abstract :
This paper presents a complete base-band chain for current and emerging WLAN in 1.4V 90nm CMOS. The chain consists of a 6th order elliptic Gm-C 1/10/100MHz filter and five VGA stages. The design is DC-offset free and uses optimized Gm stages for linearity and low voltage operation. IIP3 is 2dBm @ 13.5dB minimum gain, while dissipating 13.5mW.
Keywords :
CMOS digital integrated circuits; amplifiers; elliptic filters; wireless LAN; 1 MHz; 1.4 V; 10 MHz; 100 MHz; 13.5 dB; 13.5 mW; 6th order elliptic filter; 90 nm; DC-offset correction; Gm-C filter; VGA chain; base-band chain; digital CMOS process; linear filter; variable gain amplifier; wireless LAN; CMOS process; Circuit noise; Digital filters; Frequency; Impedance; Linearity; Noise reduction; Nonlinear filters; Transfer functions; Wireless LAN;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on
Print_ISBN :
4-900784-01-X
Type :
conf
DOI :
10.1109/VLSIC.2005.1469391
Filename :
1469391
Link To Document :
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