Optimal zigzag (OZ): an effective yet feasible power-gating scheme achieving two orders of magnitude lower standby leakage

An effective yet easy-to-implement power-gating scheme is proposed to reduce leakage by two orders of magnitude. Proposed optimal zigzag ("OZ scheme") utilizes optimal combination of input-phase-forcing (IPF) and zigzag cut-off CMOS on critical paths, while uses high-V_TH cells on noncritical paths. Various low-leakage design alternatives including dual-V_TH, off-off stacking, MTCMOS, and selective MTCMOS are compared with the proposed OZ scheme in terms of delay, leakage power, and area. With 65-nanometer technology and ten typical benchmark circuits, the OZ scheme has been shown to achieve 70% less leakage, 9.4% faster speed, and 37% smaller area than selective MTCMOS which is the most widely used power-gating approach to date.