DocumentCode :
3549986
Title :
2.8 Gb/s inductively coupled interconnect for 3D ICs
Author :
Xu, Jian ; Wilson, John ; Mick, Stephen ; Luo, Lei ; Franzon, Paul
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
fYear :
2005
fDate :
16-18 June 2005
Firstpage :
352
Lastpage :
355
Abstract :
An inductively coupled interconnect scheme for vertical signaling in 3D ICs is demonstrated. Test chips were fabricated in TSMC 0.35 μm CMOS technology, then thinned and stacked. For 90 μm thick chips using 150 μm inductors, the transceiver communicates NRZ signals at 2.8Gb/s, and tolerates up to 50 μm misalignment. TX and RX power dissipation are 10.0 mW and 37.6 mW, respectively. The transceiver circuit does not require a clock to recover the data and is able to maintain less than 100 ps jitter at the RX output.
Keywords :
CMOS integrated circuits; inductors; integrated circuit design; integrated circuit interconnections; transceivers; transformers; 0.35 micron; 100 ps; 150 micron; 2.8 Gbit/s; 3D integrated circuit; 90 micron; AC coupled interconnects; CMOS technology; NRZ signals; RX power dissipation; TX power dissipation; inductive coupling; inductors; integrated circuit interconnects; transceiver; transformer; vertical signaling; CMOS technology; Coupling circuits; Inductors; Integrated circuit interconnections; Optical signal processing; Parasitic capacitance; Pulse amplifiers; Pulse transformers; Switches; Transceivers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on
Print_ISBN :
4-900784-01-X
Type :
conf
DOI :
10.1109/VLSIC.2005.1469403
Filename :
1469403
Link To Document :
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