A dual band 1.8 GHz/900 MHz, 750 kb/s GMSK transmitter utilizing a hybrid PFD/DAC structure for reduced broadband phase noise

Author

Meninger, Scott E. ; Perrott, Michael H.

Author_Institution

Massachusetts Inst. of Technol., Cambridge, MA, USA

fYear

2005

fDate

16-18 June 2005

Firstpage

394

Lastpage

397

Abstract

This paper presents the key circuits of a 1 MHz bandwidth, 750 kb/s GMSK transmitter. The fractional-N synthesizer forming the basis of the transmitter uses a combined phase-frequency detector (PFD) and digital-to-analog converter (DAC) circuit element to obtain > 28 dB high frequency noise reduction when compared to classical ΣΔ frequency synthesis. This large reduction in phase noise makes high bandwidth, low noise (-154 dBc/Hz @ 20 MHz offset for 3.565 GHz output) synthesis possible, allowing direct modulation transmission of GMSK data at 750 kb/s.

Keywords

CMOS integrated circuits; digital-analogue conversion; frequency synthesizers; phase noise; radio transmitters; ΣΔ frequency synthesis; 1 MHz; 1.8 GHz; 750 kbit/s; 900 MHz; broadband phase noise; circuit element; digital-to-analog converter; direct modulation transmission; dual band GMSK transmitter; fractional-N synthesizer; high bandwidth low noise synthesis; high frequency noise reduction; hybrid PFD/DAC structure; phase-frequency detector; Bandwidth; Circuit synthesis; Dual band; Frequency conversion; Frequency synthesizers; Noise reduction; Phase detection; Phase frequency detector; Phase noise; Transmitters;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on

Print_ISBN

4-900784-01-X

Type

conf

DOI

10.1109/VLSIC.2005.1469412

Filename

1469412