A very low current transistor structure

Silicon transistors have been fabricated which exhibit useful current gain at emitter current levels below 10^-9amp. It has been proposed that the fall off of current gain with decreasing emitter current is due to the recombination of the surface component of injected current. The structure described decreases the loss due to such recombination by placing the surface collector base junction in very close proximity to the surface emitter base junction. The normal current gain maximum is in the range of 10^-3amp. However, below this point some devices have shown the characteristic of increasing current gain with decreasing emitter current down to approximately 10^-6amp. Below this point the gain falls off, with further lowering of the emitter current, in the conventional manner. These devices have then two beta peaks, one at 10^-3amp and one at 10^-6amp. This characteristic is shown to be dependent upon surface base width. The structure also allows the devices to be made with very small junction areas, and the resulting low capacitances give them unusual and useful properties.