Sixteen bit monolithic memory array clip

A 70 × 70 mil monolithic silicon memory chip has been successfully fabricated which is used as a unit building block to structure a three dimensional high speed scratch pad memory. The chip contains 16 memory cells with each cell consisting of 5 transistors and 4 resistors. The memory array can be non-destructively read with an 8 nanosecond pulse width and requires a 20 nanosecond write pulse width. The "one" signal level is 60 millivolts into a 20 ohm sense load with essentially an infinite signal to noise ratio. The integrated silicon devices have npn planar diffused structures with junction isolation. The circuits have single level fixed pattern interconnections on thermally grown oxide with one underpass resistor per cell to provide the crossing of signal lines.