• DocumentCode
    3553161
  • Title

    A trim bipolar charge storage memory

  • Author

    Panousis, P.T.

  • Author_Institution
    Bell Telephone Laboratories, Murray Hill, N.J.
  • Volume
    16
  • fYear
    1970
  • fDate
    1970
  • Firstpage
    18
  • Lastpage
    18
  • Abstract
    A bipolar stored-charge memory cell will be described that consists of a single transistor with an MOS capacitor between emitter and ground. The transistor serves as a bidirectional switch allowing charge to selectively flow into or out of the storage capacitor. The cell requires periodic refreshing of the stored charge since electron-hole generation in the depletion region of the emitter tends to discharge it. However, because most of the charge is stored on the MOS capacitor, storage times of several seconds at room temperature should be expected.
  • Keywords
    Bipolar transistors; Laboratories; Land surface temperature; MOS capacitors; MOSFETs; Production; Read-write memory; Substrates; Switches; Telephony;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1970 International
  • Type

    conf

  • DOI
    10.1109/IEDM.1970.188215
  • Filename
    1476327