Fabrication of enhancement n-channel Mosfets using ion implanted boron for controlled channel doping

A MOS circuit utilizing an ion implantation technique for controlled channel doping with boron to produce n-channel enhancement transistors with controlled threshold voltages has been developed. The ion implantation permits the use of a high resistivity silicon substrate that results in reduced p-n junction capacitances and increased circuit speed with constant threshold under all substrate-to-source back bias conditions. With selective ion implantation, enhancement devices and depletion load resistors have been fabricated on the same chip without additional processing steps. Propagation delay times of the order 10 to 20 ns have been measured for one pair of cascaded inverters.