High density ion-implanted C-MOS technology

The main interest in C-MOS technology centers around low power applications. However, a major problem with the present C-MOS is the low packing density. We report here on a C-MOS technology which will at least triple the present packing density while increasing the speed for a given power level by reducing the stray capacitance. The performance of the new C-MOS is based on the combination of ion implantation, planox, and silicon gate technology. The new technology places each complementary transistors in a separate well or pot.