Title :
Low power MOSFET memory cells using Schottky-barrier diodes
Abstract :
Joint integration of n-channel MOSFETs and Schottky-Barrier diodes (SBD) requires only modest changes in the overall FET process but offers considerable improvements over all-FET circuits in power consumption, density and performance. To implement SBD´s n+pockets are outdiffused through a p-type epitaxial layer and put in contact with the proper metal. MOS guard rings are utilized to relieve electrical field enhancement around the perimeter of the device.
Keywords :
Background noise; Charge coupled devices; Clocks; MOSFET circuits; Noise level; Noise measurement; Power MOSFET; Schottky diodes; Shift registers; Voltage;
Conference_Titel :
Electron Devices Meeting, 1972 International
DOI :
10.1109/IEDM.1972.249281
