A multiple output CCD imager for image processing applications

A 324 × 340 pixel silicon charge coupled area imager has been developed which uses non-destructive floating gate readout techniques and on-chip delay lines to provide nine simultaneous video output signals. These signals represent a 3 × 3 block of image data which scans the array as the device is read out. The 3 × 3 block can be used to implement various neighborhood operators in the analog domain for real-time image processing applications, such as edge detect ion and enhancement and star image centroid determination. The device is fabricated using a three-phase, three-level polysilicon buried channel process. Chip size is 1.27 × 1.27 cm and pixel size is 25 × 25 micrometers.