DocumentCode :
3554932
Title :
The reduction of emitter-collector shorts in a high speed, all implanted, bipolar technology
Author :
Parrillo, L.C. ; Payne, R.S. ; Seidel, T.E. ; Robinson, McD. ; Reutlinger, G.W. ; Post, D.E. ; Field, R.L.
Author_Institution :
Bell Laboratories, Murray Hill, New Jersey
Volume :
25
fYear :
1979
fDate :
1979
Firstpage :
348
Lastpage :
350
Abstract :
One of the main yield limiting mechanisms in the fabrication of shallow junction bipolar integrated circuits is emitter to collector leakage. This paper describes the progress made in reducing the E-C leakage defect density in an all implanted integrated circuit technology, which features emitters ∼0.5 µm deep and bases ∼0.3 µm wide. The median emitter to collector short density was reduced from ∼2×104to ∼200/cm2of active emitter area in the course of this study.
Keywords :
Bipolar integrated circuits; Circuit faults; Etching; Geometry; Integrated circuit technology; Integrated circuit yield; Large scale integration; Oxidation; Propagation delay; Stacking;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1979 Internationa
Type :
conf
DOI :
10.1109/IEDM.1979.189621
Filename :
1480486
Link To Document :
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