A dynamically-directed switch model for MOS logic simulation

A model for MOS transistors suitable for logic simulation of VLSI circuits is presented based on the concept of a dynamically directed switch (DDS). In this model, transistors are represented by directed edges in a graph that are capable of changing their direction dynamically. A distributed algorithm for switch-level simulation is presented that is based on an incremental graph algorithm in which edge and vertex labels are updated as a consequence of circuit events. The result is a switch-level algorithm that runs at speeds approaching gate-level logic simulators, while dealing with all the features associated with switch-level simulation: bidirectional signal flow, ratioed logic, RC-tree timing, and correct handling of transistor signal propagation in the presence of unknown signals. The implementation of this algorithm in the Lsim mixed-mode analog and digital simulator is described, and some results and examples are presented