DocumentCode
3555346
Title
A novel amorphous-silicon inverter circuit
Author
Matsumura, Masakiyo ; Nara, Yasuo ; Uchida, Yasutaka
Author_Institution
Tokyo Institute of Technology, Tokyo, Japan
Volume
26
fYear
1980
fDate
1980
Firstpage
800
Lastpage
803
Abstract
Static logic circuits suitable for amorphous-silicon field effect transistors (a-Si FETs) have been investigated. A unique a-Si FET feature that the same FET can operate in both n-channel and p-channel modes by only changing the gate voltage polarity is described. Using this feature, a novel circuit with the n-channel driver-FET and the p-channel "depletion" type load-FET is proposed. Experimental results showed that the proposed circuits had a small-signal gain of more than 20 and step-like transfer curves.
Keywords
Breakdown voltage; Decoding; Electrons; Equations; FETs; Inverters; Logic circuits; MOSFET circuits; Shape; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1980 International
Type
conf
DOI
10.1109/IEDM.1980.189960
Filename
1481403
Link To Document