DocumentCode
3555536
Title
Floating substrate effects in SOS VLSIs
Author
Hatano, Hiroshi ; Uchida, Yukimasa ; Isobe, Mitsuo ; Maeguchi, Kenji ; Tango, Hiroyuki
Author_Institution
Toshiba Corporation, Kawasaki, Japan
Volume
27
fYear
1981
fDate
1981
Firstpage
359
Lastpage
362
Abstract
New floating substrate effects which degrade the operating speed of scaled down SOS MOS VLSIs are investigated, utilizing CMOS/SOS ring oscillators with substrate electrodes and CMOS/SOS RAMs. Reverse bias floating substrate effect due to charge pumping, which increases the propagation delay time, is more pronounced with increasing substrate impurity concentration and/or decreasing power supply voltage. This charge pumping rate is greater in PMOS than in NMOS. CMOS/SOS RAM access time degradation is caused from the noise current in deselected transfer gate transistors, due to forward bias floating substrate effect which comes from the capacitive coupling between the bit line and the substrates of deselected transfer gate transistors. The importance of introducing device structures, which fix transistor substrate potential in high-speed SOS VLSI designs, is discussed based on the above results.
Keywords
Charge pumps; Degradation; Electrodes; Impurities; MOS devices; Power supplies; Propagation delay; Ring oscillators; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1981 International
Type
conf
DOI
10.1109/IEDM.1981.190087
Filename
1482040
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