DocumentCode :
3555631
Title :
1 µm 256K RAM process technology using molybdenum-polysilicon gate
Author :
Nakajima, S. ; Kiuchi, Kentaro ; Minegishi, K. ; Araki, T. ; Ikuta, K. ; Oda, Masaomi
Author_Institution :
NTT, Musashino, Tokyo, Japan
fYear :
1981
fDate :
7-9 Dec. 1981
Firstpage :
663
Lastpage :
666
Abstract :
The process technology of 1µm 256K RAM is discussed with emphasis on improvement in device characteristics degradations caused by use of reactive ion etching, electron-beam direct writing, thinner gate oxide and molybdenum films. Heavy metal contamination, caused by reactive ion etching was prevented by two step etching of Si3N4/SiO2for selective oxidation mask formation. Si3N4mask, which is frequently cracked at its sharp pattern corners during the field oxidation, was removed in hot phosphoric acid after the oxidation. The gate oxide pinhole density was reduced by perfoming a sacrifice oxidation prior to the gate oxidation. Yield of molybdenum interconnection was improved by using parallel plate plasma etching in CCl4+O2.
Keywords :
Ion implantation; Leakage current; Lithography; MOS capacitors; Oxidation; Pollution measurement; Resists; Stacking; Surface contamination; Wet etching;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1981 International
Conference_Location :
Washington, DC, USA
Type :
conf
DOI :
10.1109/IEDM.1981.190174
Filename :
1482127
Link To Document :
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